Polycrystalline tft uniformity through microstructure mis-alignment

ABSTRACT

Methods of making a polycrystalline silicon thin-film transistor having a uniform microstructure. One exemplary method requires receiving a polycrystalline silicon thin film having a grain structure which is periodic in at least a first direction, and placing at least portions ( 410, 420 ) of one or more thin-film transistors on the received film such that they are tilted relative to the periodic structure of the thin film.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based on U.S. provisional patent application Ser.No. 60/315,181, filed Aug. 27, 2001, which is incorporated herein byreference for all purposes and from which priority is claimed.

BACKGROUND OF THE INVENTION

1. Technical Field

The present invention relates to semiconductor processing techniques,and more particularly, techniques for fabricating semiconductorssuitable for use at thin-film transistor (“TFT”) devices.

2. Background Art

Semiconductor films, such as silicon films, are known to be used forproviding pixels for liquid crystal display devices and organic lightemitting diode display devices. Such films are commonly processed viaexcimer laser annealing (“ELA”) methods, where an amorphous silicon filmis irradiated by an excimer laser to be crystallized.

Significant effort has gone into the refinement of “conventional” ELA(also known as line-beam ELA) processes in the attempt to improve theperformance of the TFT devices placed on the processed semiconductorthin films. For example, U.S. Pat. No. 5,766,989 issued to Maegawa etal., the entire disclosure of which is incorporated herein in itsentirety by reference, describes the ELA methods for formingpolycrystalline thin film and a method for fabricating a TFT. The '989patent attempts to address the problem of non-uniformity ofcharacteristics across the substrate, and provide certain options forapparently suppressing such non-uniformities.

However, the details of the beam-shaping approach used in conventionalELA methods make it extremely difficult to reduce the non-uniformitiesin the semiconductor films and to improve the performancecharacteristics of such films. For example, in a low-temperaturepolycrystalline silicon (“LTPS”) process, when the size of the grainsbecomes comparable to the dimensions of the channel region of the TFT,large device-to-device non-uniformity results. This is caused by therandomness of the microstructure, i.e., the random location of thegrains and thus the grain boundaries. Such non-uniformity, especiallywhen perpendicular to the current flow, can act as a current barrier.Further, when the transistor is in its off-state, carriers are generatedat the grain boundary, which contribute to the off-current. This isespecially the case when the grain boundary is in or close to thedrain-channel junction.

Therefore, it has been realized that control over the microstructure isneeded in order to ensure a uniform TFT process, both with respect toperiodicity and location. Regarding the former, the film should beuniform, exhibiting periodicity in the location of the grains and thusthe grain boundaries. Regarding the latter, the location of the grainsand thus the grain boundaries should be controlled so that theircontribution to the electrical characteristics is the same for everysingle device.

In an pulsed-laser, e.g., an excimer laser, irradiaton process to obtainLTPS films, control over the TFT microstructure may be obtained throughthe use lithography to induce such periodicity. The use of lithographyalso accounts for location control, since the accurate alignmentprocedure of the lithographic process is used. Unfortunately, the use oflithography requires at lease one extra processing step, which in turnincreases complexity and thus costs.

Alternatively, control over the TFT microstructure may be obtainedthrough the use of sequential lateral solidification (“SLS”) techniques.For example, in U.S. Pat. No. 6,322,625 issued to Im and U.S. patentapplication Ser. No. 09/390,537 (the “'537 application”), which isassigned to the common assignee of the present application, the entiredisclosures of which are incorporated herein by reference, particularlyadvantageous apparatus and methods for growing large grainedpolycrystalline or single crystal silicon structures usingenergy-controllable laser pulses and small-scale translation of asilicon sample to implement sequential lateral solidification have beendescribed. As described in these patent documents, at least portions ofthe semiconductor film on a substrate are irradiated with a suitableradiation pulse to completely melt such portions of the film throughouttheir thickness. In this manner, when the molten semiconductor materialsolidifies, a crystalline structure grows into the solidifying portionsfrom selected areas of the semiconductor film which did not undergo acomplete melting. Thereafter, the beam pulses irradiate slightly offsetfrom the crystallized areas so that the grain structure extends into themolten areas from the crystallized areas.

Using the system shown in FIG. 1, an amorphous silicon thin film sampleis processed into a single or polycrystalline silicon thin film bygenerating a plurality of excimer laser pulses of a predeterminedfluence, controllably modulating the fluence of the excimer laserpulses, homogenizing the modulated laser pulses in a predeterminedplane, masking portions of the homogenized modulated laser pulses intopatterned beamlets, irradiating an amorphous silicon thin film samplewith the patterned beamlets to effect melting of portions thereofcorresponding to the beamlets, and controllably translating the samplewith respect to the patterned beamlets and with respect to thecontrolled modulation to thereby process the amorphous silicon thin filmsample into a single or polycrystalline silicon thin film by sequentialtranslation of the sample relative to the patterned beamlets andirradiation of the sample by patterned beamlets of varying fluence atcorresponding sequential locations thereon.

While the system of FIG. 1 is highly advantageous in generating uniform,high quality polycrystalline silicon and single crystal silicon whichexhibit periodicity and thereby solves a problem inherent withconventional ELC techniques, the technique does adequately not accountfor control over grain boundaries. For example, in the simplest form,SLS requires two pulses to crystallize the amorphous precursor into anLTPS film with partial periodicity, e.g., the 2-shot material shownschematically in FIG. 2 a. The periodicity is only in one direction,shown by long grain boundaries 210, 220, 230, 240, 250 that are parallelto each other and which also have a protrusion to them. However, theposition of the short grain boundaries is not at all controlled. Thespacing between the parallel grain boundaries can be increased, and thismaterial is in general called n-shot material. Likewise, FIG. 2 b showsa so-called 4-shot material in which the grain boundaries are periodicin both directions. Again, the spacing between the grain boundaries canbe increased, and is generally referred to as 2n-shot material.

While SLS techniques offer periodicity, such techniques do not offeraccurate control of the location of grain boundaries. Referring to FIGS.2 c-d, the LTPS film produced includes a varying number of long grainboundaries perpendicular to the current flow, and the possibility ofhaving a perpendicular grain boundary in or out of a TFT drain region.Both problems become more severe when grain size is increasing and/orwhen channel dimensions are decreasing, i.e., when the size of thegrains becomes comparable to the dimensions of the channel region. Whilethere has been a suggestion in U.S. Pat. No. 6,177,301 to Jung tomisalign TFT channel regions with respect to the grain growth direction,that suggestion is made without taking into account the underlying needto maintain uniformity in TFT microstructure. Accordingly, there existsa need for a TFT manufacturing technique that provides for control overboth the periodicity of grain boundaries and the location of TFTs inorder to provide for uniformity in TFT microstructure.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a TFT manufacturingtechnique that provides for control over both the periodicity of grainboundaries and the location of TFTs in order to provide for uniformityin TFT microstructure.

Another object of the present invention is to provide a device havinguniformity in TFT microstructure.

In order to meet these and other objects of the present invention whichwill become apparent with reference to further disclosure set forthbelow, the present invention provides methods of making apolycrystalline silicon thin-film transistor having a uniformmicrostructure. One exemplary method requires receiving apolycrystalline silicon thin film having a grain structure which isperiodic in at least a first direction, and placing at least portions ofone or more thin-film transistors on the received film such that theyare tilted relative to the periodic structure of said thin film. Thepolycrystalline silicon thin film may be formed by a sequential lateralsolidification process, e.g., a two shot sequential lateralsolidification process.

Advantageously, the portions of said one or more thin-film transistorsmay be active channel regions having a width W. Where the periodicstructure of the thin film is λ and m is a variable, the placing stepinvolves placing active channel regions on the received film such thatthey are tilted at an angle θ relative to said periodic structure ofsaid thin film, where W sin(θ)=mλ. The variable m is selected such thatthat the number of grain boundaries in any of the one or more thin-filmtransistors remains relatively controlled, and is preferablyapproximately equal to an integer.

The present invention also provides a device including a polycrystallinesilicon thin-film transistor having a uniform microstructure. In anexemplary embodiment, the device includes polycrystalline silicon thinfilm having a grain structure which is periodic in at least a firstdirection, and at least portions of one or more thin-film transistors,placed on the thin film such that they are tilted relative to saidperiodic structure of the film.

The accompanying drawings, which are incorporated and constitute part ofthis disclosure, illustrate preferred embodiments of the invention andserve to explain the principles of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a functional diagram of a prior art system for performingsemiconductor processing including sequential lateral solidification;

FIGS. 2 a-b are illustrative diagrams showing exemplary processedsilicon samples using the prior art system of FIG. 1;

FIGS. 2 c-d are illustrative diagrams showing the prior art placement ofactive channel regions of TFTs on the exemplary processed siliconsamples shown in FIG. 2 a;

FIGS. 3 a-b. are illustrative diagrams showing the placement of activechannel region of TFTs on the exemplary processed silicon samples shownin FIG. 2 a in accordance with the present invention;

FIGS. 4 a-b. are illustrative diagrams showing the placement of activechannel region of TFTs on the exemplary processed silicon samples shownin FIG. 2 a in accordance with the present invention; and

FIGS. 5 a-b. are illustrative diagrams showing the placement of activechannel region of TFTs on the exemplary processed silicon samples shownin FIG. 2 a in accordance with the present invention.

Throughout the Figs., the same reference numerals and characters, unlessotherwise stated, are used to denote like features, elements, componentsor portions of the illustrated embodiments. Moreover, while the presentinvention will now be described in detail with reference to the Figs.,it is done so in connection with the illustrative embodiments.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring again to FIGS. 2 a-b, exemplary processed silicon thin filmsusing the prior art SLS system of FIG. 1 are shown. In particular, FIG.2 a illustrates a sample processed by irradiating a region with a singleexcimer laser pulse, micro-translating the sample, and irradiating theregion with a second excimer laser pulse. While the following exemplarydescription of the invention will be with respect to this so-called“2-shot” material as an example, those skilled in the art willappreciate that the present invention is more broadly applicable tosilicon thin films that have been processed with n-shot and 2n-shot SLStechniques.

In accordance with the present invention, active channel regions of TFTsare deliberately tilted relative to the periodic microstructure of theprocessed thin film. Such tilting may be accomplished by tilting theplacement of the channel region itself on the processed thin film, oralternatively, by fabricating a thin film during SLS processing whichincludes a tilted periodic grain structure. A combination of bothalternatives may also be employed.

The precise methodology for placing TFTs on the processed thin film isnot important to the present invention, and hence any known techniquemay be employed. One exemplary technique is disclosed in U.S. Pat. No.5,766,989 to Maegawa et al., the contents of which are incorporated byreference herein.

When the active channel regions of TFTs are deliberately tilted relativeto the periodic microstructure of the processed thin film., the spreadin the number of perpendicular or long grain boundaries becomes less,leading to an increased device-to-device uniformity. In accordance withthe present invention, the tilting angle (θ) should, however, not be toolarge, as not to increase the influence of the parallel, or short, grainboundaries. The ideal value of θ can be derived from equation (1), inwhich W is the width of the channel region, λ is the spacing between theperpendicular grain boundaries, and m is preferably close to an integerin value:W*sin(θ)=m*λ,  (1)

In order to measure performance N of the TFT, equation (2) may beemployed, where L is the length of the channel region, and n is adetermined ratio:L cos(θ)=n*λ,  (2)

In equation (2), a lower value of the ration n implies increasedperformance. L is often defined by the design rule of the process and isequal for all TFT's, and typically ranges from 3 to 6 μm. W, however,can be adjusted to match the requirements on the TFT properties, andtypically ranges from 10 to 100 s μm. The spacing λ between theperpendicular brain boundaries typically ranges from 2 to 10 μm, butsmaller and larger values are possible.

Referring next to FIGS. 3 a-b, a first example of the present inventionwill be described. In this example, the ratio n=1, m=1, and θ=10degrees. As shown in FIGS. 3 a-b, all devices contain one perpendiculargrain boundary, regardless of any translation of the TFT device, e.g.,from the position shown in FIG. 3 a to that shown in FIG. 3 b.

Referring next to FIGS. 4 a-b, a second example of the present inventionwill be described. In this example, the ratio n=0.5, m=1, and θ=10degrees. As shown in FIGS. 4 a-b, the channel region contains twoportions, a first 410 in which one perpendicular grain boundary ispresent, and a second 420 in which no perpendicular grain boundary ispresent.

In latter portion 420, the device exhibits behavior as that of a TFT infully directionally solidified material in which carriers are nothampered by grain boundaries. As shown in FIGS. 4 a-b, the relativecontribution of each of these two parts is again invariable to anytranslation of the device, e.g., from the position shown in FIG. 4 a tothat shown in FIG. 4 b.

While the examples shown in FIGS. 3-4 are considered to be the idealscenarios, where m is an integer, small deviations from use of aninteger value may be used in accordance with the present invention.However, the deviation from an integer value must be selected such thatthe number of grain boundaries in any given TFT remains relativelycontrolled.

Referring next to FIGS. 5 a-b, further examples of the present inventionwill be described. In FIG. 5 a, the ratio n=2.1, m=1, and θ=10 degrees;in FIG. 5 b, the ratio n=2.1, m=0.5, and θ=5 degrees. As shown in FIGS.5 a-b, for the ideal value of θ, the number of grain boundaries is againinvariable to any translation of the device. However, when θ deviatesfrom this value, translations increasingly change the number of grainboundaries. When n equals, or is very close to, an integer the number ofgrain boundaries is essentially invariant for changes in θ. Of course itshould exceed a certain value to assure that the fraction ofperpendicular grain that is in the drain region is also invariant totranslations.

The foregoing merely illustrates the principles of the invention.Various modifications and alterations to the described embodiments willbe apparent to those skilled in the art in view of the teachings herein.It will thus be appreciated that those skilled in the art will be ableto devise numerous systems and methods which, although not explicitlyshown or described herein, embody the principles of the invention andare thus within the spirit and scope of the invention.

1. A method of making a polycrystalline device including two or morethin-film transistors of substantially uniform microstructure,comprising the steps of: (a) receiving a polycrystalline silicon thinfilm having a grain structure which is periodic in at least a firstdirection; and (b) placing at least portions of two or more thin-filmtransistors on said received film tilted at an angle relative to saidperiodic structure of said thin film, such that that the number of longgrain boundaries in any of said portions remains substantially uniform.2. The method of claim 1, wherein said receiving step comprises the stepof receiving a polycrystalline silicon thin film formed by a sequentiallateral solidification process.
 3. The method of claim 1, wherein saidportions of said two or more thin-film transistors comprise activechannel regions having a width W.
 4. The method of claim 3, wherein saidperiodic structure of said thin film is λ, m is a variable, and saidplacing step comprises the step of placing said active channel regionson said received film such that said active channel regions are tiltedat an angle θ relative to said periodic structure of said thin film,where W sin(θ)=mλ.
 5. The method of claim 4, wherein m substantiallyequal to an integer.
 6. The method of claim 4, wherein m is equal to aninteger.
 7. The method of claim 4, wherein m is equal to the integer 1.8. A method of making a device including thin-film transistors,comprising the steps of: (a) receiving a polycrystalline silicon thinfilm having a grain structure which is periodic in at least a firstdirection in an amount λ; and (b) placing at least portions of one ormore thin-film transistors having a width W on said received film tiltedat an angle θ relative to said periodic structure λ of said thin film,such that W sin(θ)=mλ, where m is substantially equal to an integer. 9.The method of claim 8, wherein said receiving step comprises the step ofreceiving a polycrystalline silicon thin film formed by a sequentiallateral solidification process.
 10. The method of claim 8, wherein saidportions of said one or more thin-film transistors comprise activechannel regions having a width W.
 11. The method of claim 10, wherein mis equal to an integer.
 12. The method of claim 10, wherein m is equalto the integer
 1. 13. A device including two or more polycrystallinesilicon thin-film transistors of substantially uniform microstructure,comprising: (a) a polycrystalline silicon thin film having a grainstructure which is periodic in at least a first direction; and (b) atleast two or more thin-film transistor portions placed on said receivedfilm, each tilted at an angle relative to said periodic structure ofsaid thin film, such that that the number of long grain boundaries inany of said portions remains substantially uniform.
 14. The device ofclaim 13, wherein said polycrystalline silicon thin film comprises thinfilm formed by a sequential lateral solidification process.
 15. Thedevice of claim 13, wherein said portions of said two or more thin-filmtransistors comprise active channel regions having a width W.
 16. Thedevice of claim 13, wherein said periodic structure of said thin film isλ, m is a variable, and said active channel regions are tilted at anangle θ relative to said periodic structure of said thin film, where Wsin(θ)=mλ.
 17. The device of claim 16, wherein m is substantially equalto an integer.
 18. The device of claim 16, wherein m is equal to aninteger.
 19. The device of claim 16, wherein m is equal to the integer1.